Engineering

Gujarat Startup Teams Up with Semtech for Indigenous LoRa-Enabled RISC-V IoT Chip

By Sanjay Patel | Published July 27, 2026

Gujarat Startup Teams Up with Semtech for Indigenous LoRa-Enabled RISC-V IoT Chip

A pioneering Gujarat semiconductor startup collaborates with Semtech to co-design an indigenous LoRa-enabled RISC-V microchip, accelerating India's IoT hardware mission.

In a landmark development for India’s hardware and semiconductor ecosystem, a promising Gujarat-based fabless chip design startup has officially partnered with global analog and mixed-signal leader Semtech Corporation to co-develop an indigenous, ultra-low-power LoRa-enabled RISC-V microchip. Designed specifically for long-range Internet of Things (IoT) applications, smart agriculture, utility metering, and industrial automation, this breakthrough silicon architecture represents a major stride in reducing reliance on imported microcontroller units (MCUs) while accelerating national hardware self-reliance.

By pairing the open-source RISC-V ISA (Instruction Set Architecture) with Semtech’s proprietary LoRa (Long Range) wireless modulation technology, the joint design initiative aims to deliver enterprise-grade connectivity operating across sub-GHz industrial bands with sub-milliwatt idle power consumption.

Technical Architecture & Silicon Specifications

| Specification Metric | Engineering Target | Strategic Advantage | |---|---|---| | Core Architecture | 32-bit RV32IMC RISC-V Core | License-free, customizable open hardware architecture | | Wireless Transceiver | Integrated Semtech LoRa Sub-GHz Transceiver | Long-range communication up to 15km in rural settings | | Operating Voltage Range | 1.8V to 3.6V DC | Extended battery lifespan up to 10+ years on single cell | | Manufacturing Node | 28nm Planar CMOS | Domestic fab compatibility & optimal cost-to-efficiency ratio | | Security Module | Hardware Crypto Engine (AES-256, ECC, PUF) | Immutable hardware Root-of-Trust for IoT device security | | Target Sector Applications | Smart Agriculture, Water Grids, Industrial Telemetry | Customized for harsh tropical operating environments |

Strategic Synergies: RISC-V Meets LoRa Networking

The collaboration bridges Semtech's decade-long dominance in long-range low-power radio communication with India's emerging expertise in open-source instruction set computing. Unlike legacy proprietary architectures that levy hefty licensing royalties, the RISC-V foundation permits native domain-specific hardware accelerators to be integrated directly onto the silicon die alongside the LoRa physical layer (PHY).

This architectural integration substantially reduces board real estate, cuts BOM (Bill of Materials) costs for IoT sensor manufacturers by an estimated 35%, and optimizes thermal efficiency under sustained transmission cycles.

Packaging a high-efficiency RISC-V core directly alongside Semtech's industry-proven LoRa transceiver on a single silicon die solves the classic power-density puzzle for smart infrastructure,
noted Rajesh Shah, Chief Hardware Architect at the Gujarat venture. "This indigenous SoC ensures that Indian smart city deployments, precision farming sensors, and energy grids are powered by resilient, secure, domestic hardware."

Aligning with the India Semiconductor Mission (ISM)

This joint venture builds upon the broader momentum across the domestic hardware landscape, complementing recent infrastructure milestones such as the $1.48B Sovereign AI Data Center Initiative and the expansion of domestic assembly and testing facilities across Western India.

!LoRa-Enabled RISC-V Silicon Architecture

Commercial engineering samples of the new LoRa-RISC-V SoC are slated for tape-out in early Q1 2027, with high-volume commercial production expected to support national smart-metering and agricultural IoT deployments nationwide.